Manufacturing Bits: Oct. 11


IC security using AFMs
The National Institute of Standards and Technology (NIST) has developed a probe assisted doping technique (PAD), a technology that could help prevent counterfeit chips and electronic devices from entering the market.

PAD involves creating a unique ID tag on every chip using an atomic force microscope (AFM). Basically, an AFM system incorporates a cantilever with a tiny hard tip or needle. Using AFMs, ID tags are embedded into a device during the manufacturing process. The device is easily authenticated using RF, which in turn ensures a secure supply chain for components in critical systems, according to NIST.

PAD is one of many ways to prevent nefarious groups from developing counterfeit chips, which ultimately end up in systems of all types. It’s a big problem as the counterfeit chip market had a worldwide value estimated at $75 billion in 2019, according to Rambus.

Today, there are already well-entrenched security solutions in the IC market. For some time, the IC industry has used traditional non-volatile memory for secure code storage applications. This memory can store a few bits of authentication information for security purposes using electric-fuse (eFuse) or anti-fuse technology. This is one way to prevent counterfeit chips.

The current solutions may not always be full-proof, prompting the need for a new technology. For example, Multibeam is developing a security lithography technology. Basically, using multi-beam technology, Multibeam’s system can pattern and embed a unique ID inside each IC during fabrication. The system hard codes the ID at the silicon level, making it tamper-proof. The information can link to a secure database to store individual chip data.

NIST has another solution–PAD. In the PAD process, a vendor deposits a thin layer of aluminum atoms on a wafer. The wafer itself consists of chips based on a given design. All told, PAD produces customizable superlattices of p-n junctions on a semiconductor substrate, according to NIST. The diameter of the implanted region is no larger than 200nm.

Then, a vendor would make use of an AFM. The tip of an AFM pushes some but not all of the atoms down in the surface. Then, the wafer is…

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